Tag:signal

  • Deep understanding of computer systems – exceptions

    Time:2021-9-16

    Modern operating systems respond to some unexpected situations (disk read-write data is ready, hardware timer generates signals, etc.) by mutating the control flow. Generally speaking, we name these mutations as exceptional contractual flow (ECF). Abnormal control flow occurs at all levels of the computer system. For example, in the hardware layer, when the hardware detects […]

  • Hot and cold signals of RAC

    Time:2021-9-16

    (this article)articleIt was originally published on CSDN, but now the blog is migrated and rearranged and modified with markdown) Racsignal signals can be divided into hot and cold signals. In short, the so-called cold signal can be understood as passive. Messages will be published only when there are subscribers, and messages will be sent again […]

  • RAC first acquaintance

    Time:2021-9-15

    (this article was originally published on CSDN, but now the blog is migrated and rearranged and modified with markdown) The original English text of this article comes from this articlearticleBut I only translated selectively. RAC emphasizes atomic operation and assembly. Rac is basically based on signals, that is, racsignal. All operations can be converted into […]

  • Into the world of reactivecocoa

    Time:2021-9-9

    Before learning reactive cocoa, learn the concepts ReactiveCocoaIt is an open source FRP framework based on cocoa. The full name of FRP isFunctional Reactive ProgrammingIt is the FP (functional programming) implementation of RP (reactive programming). It’s hard to say. Too many details are not discussed. Let’s first focus on the FP characteristics of FRP. Functional […]

  • Python utility, Python and pyqt5 development framework to realize simple browser

    Time:2021-8-26

    development tool Python version: 3.5.4Related modules:Pyqt5 module (version 5.10) and some Python built-in modules. Main ideas Main functions:(1) Web pages can be displayed normally;(2) Set the navigation bar to realize the forward, backward, stop loading and refresh functions of the browser;(3) Set the address bar, which can update the URL of the current web page […]

  • DRF — buffer and signal of Django

    Time:2021-8-19

    1、 Django cache 1.Cache location Cache location: 1 in memory 2 file (on hard disk) 3 database cache (on hard disk) 4. Redis (it is used in the middle and later stages, in memory, faster) 5. Set the cache location through configuration -Take the file cache as an example and configure it in settings.py CACHES […]

  • Spool process multithreaded instance

    Time:2021-8-15

    <?php /** *Create multiple processes */ $worker_ num = 30; // Default processes $workers = []; // Process save $redirect_ stdout = false; // Redirect output; The purpose of this parameter will see the effect later for($i = 0; $i < $worker_num; $i++){ $process = new swoole_process(‘callback_function’, $redirect_stdout); //Enable message queuing, int $msgkey = 0, […]

  • Explain in detail behind webrtc’s high sound quality and low delay – AGC

    Time:2021-8-2

    Introduction:This paper will comprehensively analyze the basic framework of webrtc AGC with examples, and explore its basic principle, mode differences, existing problems and optimization direction. Earlier, we introduced the in webrtc audio 3aAcoustic echo cancellation (AEC)In this chapter, we will talk about another “a”–   Automatic gain control (AGC). This paper will comprehensively analyze the […]

  • Ruffian Heng embedded: look at the AHB read access under the flexspi peripheral of i.mxrt by grasping the flash signal waveform (full acceleration)

    Time:2021-8-1

    Hello, I’m ruffian Heng, a serious technical ruffian. What ruffian Heng introduced to you today isLook at the AHB read access under the flexspi peripheral of i.mxrt by grasping the flash signal waveform。 Last articleAHB read access (with prefetching) under flexspi peripheral of i.mxrt according to the actual flash signal waveformLippi Heng grabs the flash […]

  • FPGA / IC position — Summary of common questions in written interview of large companies

    Time:2021-7-29

    FPGA / IC position — Summary of common questions in written interview of large companies1: What are synchronous logic and asynchronous logic?Synchronization logic is that there is a fixed causal relationship between clocks. Asynchronous logic is that there is no fixed causal relationship between clocks. The answer should be consistent with the above question (Supplement): […]

  • Handle input support of black soul remake game — Unity notes

    Time:2021-7-28

    Today’s implementation:Input ManagerTo configure the handle, we will use unity’s own input manager. This system can eliminate the differences of input devices, unify various inputs, customize new inputs, and provide input related parameters for modification.After careful observation, it can be found that two are set for each input form in the default input manager. Take […]

  • Use the signal.notifycontext of go 1.16 to make your service restart more elegant

    Time:2021-7-25

    In the update to go 1.16,signalThe package adds a functionNotifyContext,This makes our graceful restart service more elegant. The graceful restart of a service mainly includes two aspects: Exited old service needsGraceful Shutdown, no forced killing of processes and no leakage of system resources. Restart service instances in a cluster in turn to ensure uninterrupted service. […]