STM32 network circuit design

Time:2021-10-25

In previous tweets《SMI interface of STM32 network》《MII and RMII interfaces of STM32 network》, all interfaces of STM32 Ethernet and external PHY are introduced.

If some students are not familiar with SMI, MII and RMII interfaces, it is recommended to read the two articles mentioned above, otherwise they may not understand the following.

picture

Zone 1:We call it SMI interface, which is used to configure external PHY chip.

Zone 2:It is the data exchange interface, that is, the MII interface and RMII interface we mentioned above.

Using these interfaces, there can be many different network circuit design schemes, which I will summarize here.

01. MII interface scheme

MII interface in the article《MII and RMII of STM32 network》It has been introduced in detail, from which we know that a 25MHz clock is required.

For MII interface, the most commonly used scheme is that STM32 is externally connected with 25MHz crystal oscillator.

  1. The internal PLL configures hclk and provides it to the kernel and peripherals.

  2. The external PHY connection provides a 25MHz MCO pin.

This scheme is suitable for stm32f107 / 2×7 / 4×7.

picture

02. RMII interface scheme

RMII interface in the article《MII and RMII of STM32 network》It has been introduced in detail, from which we know that a 50MHz clock is required.

2.1. external crystal oscillator(2Crystal oscillator)

This scheme requires two crystal oscillators in succession.

  1. An external 25MHz crystal oscillator is connected, and the internal PLL is configured with hclk, which is provided to the kernel and peripherals.

  2. An external 50MHz crystal oscillator outputs a 50MHz clock and provides it to the MAC controller and external PHY.

This scheme is suitable for stm32f107 / 2×7 / 4×7.

picture

2.2. external crystal oscillator(1Crystal oscillator)

Only one 50m crystal oscillator needs to be connected to the outside of this scheme. One crystal oscillator provides clock for STM32 and external PHY at the same time, which can save cost.

Important: this scheme cannot be used for stm32f2x7. It is only applicable to stm32f107 / 4×7.

picture

Pay attention to the difference in the figure above

picture

This is because the OSC part of HSE is filtered out. Through HSE bypass, the 50MHz clock has been input to PLL through oscin, and then the clock providing kernel and peripherals is generated through PLL.

2.3 strong PHY is required

This scheme also uses a 25MHz crystal oscillator, but requires a powerful PHY chip. This PHY can multiply the internal frequency of the input 25MHz clock to 50MHz clock, and then output it to the MAC control module of STM32.

  1. An external 25MHz crystal oscillator is connected, and the internal PLL is configured with hclk, which is provided to the kernel and peripherals.

  2. STM32 provides 25MHz clock to external PHY through MCO pin.

  3. The external PHY internally generates a 50MHz clock and provides it to the MAC control module of STM32.

This scheme is suitable for stm32f107 / 2×7 / 4×7.

I personally do not recommend this scheme, which is not conducive to the later replacement of materials.

picture

Click to view the album where this article is located,Stm32f207 network development

Recommended Today

Swift advanced (XV) extension

The extension in swift is somewhat similar to the category in OC Extension can beenumeration、structural morphology、class、agreementAdd new features□ you can add methods, calculation attributes, subscripts, (convenient) initializers, nested types, protocols, etc What extensions can’t do:□ original functions cannot be overwritten□ you cannot add storage attributes or add attribute observers to existing attributes□ cannot add parent […]