Ruffian Heng embedded: after soft reset in continuous read mode of serial nor flash, i.mxrt cannot start SW reset of problem solution

Time:2021-7-25

Hello, I’m ruffian Heng, a serious technical ruffian. What ruffian Heng introduced to you today isi. Experience in solving the problem that the continuous read mode of enabling nor flash on mxrt cannot start normally after soft reset

Let’s review the first partI.mxrt fails to start after soft reset in continuous read mode of serial nor flash reset #, using the reset # pin reset function is the first solution found by ruffian Heng. Today ruffian Heng will continue to introduce the second solution to you.

  • There will be many articles in this series. Each article gives a series of specific implementation schemes from a core entry point.
  • This series takes mimxrt1170-evk board as the example target object, and the onboard flash model is core is25wp128 (the implementation process of other i.mxrt chips and flash models is similar, so you need to check the corresponding data manual).

1、 Solution ideas

We know that the failure to start is caused by the soft reset of the main chip, but the flash is still in continuous read mode. To solve this problem, it is only from the following three angles. Ruffian Heng will do it all once in the later specific implementation scheme (if applicable).

  • 1、 ROM does not do any related processing, but app is calling NVIC_ Systemreset() switches flash back to normal mode before resetting;
  • 2、 The app does not do any related processing, and makes some adjustments to the bootrom related configuration, so that the bootrom can also normally process flash in continuous read mode;
  • 3、 ROM and app jointly do some special processing for flash mode switching.

2、 Core entry point (with the help of soft reset command function of flash)

The core entry point of this paper is to use the software reset command of flash. There are two kinds of software reset timing of flash: one is specified in JEDEC standard (strictly speaking, it is actually hardware reset, but it needs the cooperation of cs#, SCK and IO0 signal lines, so ruffian Heng classifies it as software reset timing); The other is the software reset command defined by the manufacturer (because the flash encapsulated in soic-8 has no independent reset # pin, the manufacturer adds this soft reset command to replace the missing independent reset # pin function).

2.1 JEDEC standard reset sequence

JEDEC Association specifies a flash reset sequence, which needs the cooperation of CS #, SCK and IO0 signal lines. The sequence is as follows: keep the SCK level unchanged (high / low), pull the CS # signal four times, and output 4’b0101 (sampling on the CS # rising edge) through the Si signal line, then the flash will enter the reset state.

JEDEC standard reset function is not integrated with all flash. The mainstream flash models of Huabang and Xincheng do not support JEDEC standard reset. The adesto atxp032 series flash known by ruffian Heng has JEDEC standard reset.

The relevant timing requirements for JEDEC standard reset in atxp032 data manual are as follows. After entering JEDEC reset, tXUDPDTime to recover.

2.2 software reset command sequence

Reset related commands can usually be found in the command set of the flash data manual. In the is25wp128 data manual, we can find the following soft reset sequence, which is completed by the combination of 0x66 (rsten) and 0x99 (RST) commands. After the main chip sends the command combination, flash enters the reset state.

Is25wp128 software reset requires a maximum recovery time of 100US. During the recovery period, read, write and erase operations on flash will not take effect.

3、 Concrete implementation

If the method described in this chapter is completed in the app (XIP app here), the relevant processing code added in the app (note that all executed codes) needs to be ramfunc attribute (i.e. running in internal RAM), so that flash can be operated without restriction. In addition, before running the code, you need to turn off the global interrupt to prevent interrupt triggering during execution, resulting in the execution of relevant irqhandler functions in flash.

#if (defined(__ ICCARM__))

3.1 ROM only

Let’s just solve the problem from the perspective of Rom. we can first look at the old text before ruffian HengUnderstanding the optimization points of serial nor flash startup initialization process in i.mxrt1060 series ROMSection 2.3 in. JEDEC standard reset is integrated in the serial nor flash startup process in the ROM of some i.mxrt models.

If you want to use the JEDEC standard reset function integrated in ROM, flash itself must support JEDEC standard reset. The example of this series is about JEDEC in the fusemap table of the main chip i.mxrt1170_ Reset is defined as follows, so we need to burn the fuse 0xc80 [6] bit to 1.

3.2 only app related processing

The prerequisite of the method in the previous section is that flash should support JEDEC standard reset, but the selected flash in the actual customer project often does not integrate JEDEC standard reset. Therefore, we should make more articles on the soft reset commands defined by the manufacturer, which needs to solve the problem from the perspective of app.

The following two reset commands can be found in the is25wp128 data manual, reset_ flash_ to_ In the normal () function, you only need to send these two commands in order, and the delay is enough for the soft reset recovery time.

The code can be based on \ SDK_ 2.9.1_ MIMXRT1170-EVK\boards\evkmimxrt1170\driver_ examples\flexspi\nor\polling_ Flexspi under transfer \ CM7_ nor_ polling_ Transfer. C and flexspi_ nor_ flash_ Ops. C and add the following code:

#define NOR_ CMD_ LUT_ SEQ_ IDX_ RESETENABLE 14

In order to ensure that the above codes are executed in RAM, the following changes need to be made in the project link file (taking IAR as an example):

initialize by copy { readwrite, 
                     section .textrw, 
                     object fsl_common.o,
                     object I64DivZer.o,
                     object I64DivMod.o,
                     object fsl_flexspi.o,
                     object flexspi_nor_flash_ops.o,
                     object flexspi_nor_polling_transfer.o,
                     section CodeQuickAccess };

3.3 joint processing of ROM and app

From the perspective of ROM and app joint processing, there is no advantage in the entry point of reset command, which is omitted here.

So far, the continuous read mode that enables nor flash on i.mxrt cannot start normally after soft reset. The experience of solving the problem is introduced by ruffian Heng. Where is the applause~~~

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