Ruffian Heng embedded: after soft reset in continuous read mode of serial nor flash, i.mxrt cannot start reset of problem solution#

Time:2021-7-26

Hello, I’m ruffian Heng, a serious technical ruffian. What ruffian Heng introduced to you today isi. Experience in solving the problem that the continuous read mode of enabling nor flash on mxrt cannot start normally after soft reset

Previous articleEnable continuous read mode of serial nor flash in fdcb of i.mxrt startup headIn, PI Ziheng briefly introduced the function and significance of the continuous read mode of flash, and tried to enable the continuous read mode of Xincheng is25wp128 on mimxrt1170-evk for a practice (mainly the change of fdcb startup head in Section III of this paper).

But in fact, enabling the continuous read mode of flash on i.mxrt is a little trap. If you directly insert an NVIC in the app code_ The systemreset() function is called to perform a soft reset on the master chip. You will find that the chip is not started normally from flash because flash is still in continuous read mode. In this case, the bootrom sometimes cannot be configured to read the flash content normally to start the app. Today, ruffian Heng will discuss with you to solve this problem.

  • There will be many articles in this series. Each article gives a series of specific implementation schemes from a core entry point.
  • This series takes mimxrt1170-evk board as the example target object, and the onboard flash model is core is25wp128 (the implementation process of other i.mxrt chips and flash models is similar, so you need to check the corresponding data manual).

1、 Solution ideas

We know that the failure to start is caused by the soft reset of the main chip, but the flash is still in continuous read mode. To solve this problem, it is only from the following three angles. Ruffian Heng will do it all once in the later specific implementation scheme (if applicable).

  • 1、 ROM does not do any related processing, but app is calling NVIC_ Systemreset() switches flash back to normal mode before resetting;
  • 2、 The app does not do any related processing, and makes some adjustments to the bootrom related configuration, so that the bootrom can also normally process flash in continuous read mode;
  • 3、 ROM and app jointly do some special processing for flash mode switching.

2、 Core entry point (with the help of hard reset pin function of flash)

The core entry point of this paper is to use the hardware reset pin of flash. There are two kinds of flash hardware reset pins: one is independent, which is common in soic-16 package (in this case, there are requirements for board level design, and the flash reset pin needs to be connected to the GPIO of the main chip i.mxrt during board level design); The other is multiplexed on IO3, which is commonly used in soic-8 packaging.

If it is an independent reset pin (reset #), the main chip GPIO can directly pull down (pay attention to the requirements of low-level duration, see the flash data manual for details); If it is a multiplexed reset pin (reset # / IO3), you need to activate the reset function of IO3 first, and then pull down.

It can be found in the is25wp128 data manual that the low level of reset # signal needs to last at least 1US (table T below)RESET, if the reset # low-level duration is less than 1US, it may not affect the reset of the flash device, but it is not recommended). After the flash enters the reset, it needs a maximum recovery time of 100US (table T below)HWRST), the read / write operation on flash during the recovery period will not take effect, so the reset function (reset in Section 3.2 below_ flash_ via_ Pin) it is better to ensure sufficient waiting time (so that the reliability of flash operation in subsequent codes can be guaranteed).

3、 Concrete implementation

If the method described in this chapter is completed in the app (XIP app here), the relevant processing code added in the app (note that all executed codes) needs to be ramfunc attribute (i.e. running in internal RAM), so that flash can be operated without restriction. In addition, before running the code, you need to turn off the global interrupt to prevent interrupt triggering during execution, resulting in the execution of relevant irqhandler functions in flash.

#if (defined(__ ICCARM__))

3.1 ROM only

Let’s just solve the problem from the perspective of Rom. we can first look at the old text before ruffian HengInitialization process of serial nor flash startup in i.mxrt1050 series ROMSection 2.1 in. i. The startup process of serial nor flash in the full series ROM of mxrt is similar.

If you want to use the flash hardware reset function integrated in ROM, flash itself must contain an independent hardware reset # pin. The example of this series is about reset in the fusemap table of the main chip i.mxrt1170_ The pin is defined as follows. During board level design, the flash reset # pin should be connected to gpio4 [3] or gpio2 [8] (depending on the fuse 0xc80 [5] bit), and we should burn the fuse 0xc80 [7] bit to 1.

3.2 only app related processing

The prerequisite of the method in the previous section is that flash should include independent reset # pin, but there are more flash options in soic-8 package in actual customer projects. Therefore, we should do more work on the multiplexed reset #/ IO3 pin, which needs to solve the problem from the perspective of app.

Let’s first look at the detailed function explanation of reset # / IO3 pin from the is25wp128 data manual, mainly as follows:

1. The function of IO3 pin is hold # / reset only when QE mode is not enabled (flash internal status register [6] = 0)#

So reset_ flash_ to_ In the normal() function, we need to set the status register to switch the flash to the QE disabled state (I.When mxrt starts running the app, the flash should be in the QE enabled state), then set the read register to specify the IO3 reset function as reset #, and then lower the GPIO corresponding to IO3 until the minimum reset time requirement is met, Finally, restore all the previously overwritten status register / read register. The following commands are mainly involved in the process:

The code can be based on \ SDK_ 2.9.1_ MIMXRT1170-EVK\boards\evkmimxrt1170\driver_ examples\flexspi\nor\polling_ Flexspi under transfer \ CM7_ nor_ polling_ Transfer. C and flexspi_ nor_ flash_ Ops. C and add the following code:

#define NOR_ CMD_ LUT_ SEQ_ IDX_ WRITESTATUSREG 9

In order to ensure that the above codes are executed in RAM, the following changes need to be made in the project link file (taking IAR as an example):

initialize by copy { readwrite, 
                     section .textrw, 
                     object fsl_common.o,
                     object I64DivZer.o,
                     object I64DivMod.o,
                     object fsl_gpio.o,
                     object fsl_flexspi.o,
                     object flexspi_nor_flash_ops.o,
                     object flexspi_nor_polling_transfer.o,
                     section CodeQuickAccess };

3.3 joint processing of ROM and app

For the joint processing of ROM and app, there is no advantage in the entry point of reset pin, which is omitted here.

So far, the continuous read mode that enables nor flash on i.mxrt cannot start normally after soft reset. The experience of solving the problem is introduced by ruffian Heng. Where is the applause~~~

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