Piziheng embedded: change iomuxc in i.mxrt1xxx_ GPR register reserved bit may cause system exception

Time:2021-7-19

Hello everyone, I’m a ruffian Heng. I’m a serious technical ruffian. Today, ruffian Heng introduces to youChange iomuxc in i.mxrt1xxx_ GPR register reserved bit may cause system exception

A very active friend in piziheng’s embedded technology communication group (net name: Wen, piziheng has designated him as the Deputy Group Leader) recently reflected to piziheng a problem that the dynamic adjustment of flexram in i.mxrt1062 application program caused wdog module to work abnormally. After some investigation, piziheng found a little secret in i.mxrt chip system design, This secret reminds us that we should try our best to follow the cautious peripheral register assignment method in MCU. What is the cautious register assignment method? Ruffian Heng will tell us the secret at the end of this article. Today, ruffian Heng will restore the process of solving this problem, hoping to inspire you

1、 Representation of wdog affected by reconfiguration of flexram

Ruffian Heng explains the background of the problem first. This netizen tested it on i.mxrt1062 board using the SDK_ EVK-MIMXRT1060\boards\evkmimxrt1060\driver_ Examples / wdog / IAR routine (XIP). He changed the project startup file and main function as follows:

int main(void)

He’s starting the file startup_ In mimxrt1062. S, the flexram allocation of 128KB ITCM, 128KB dtcm and 256Kb ocram is adjusted to 256Kb dtcm and 256Kb ocram by defaultStar of change)This flexram dynamic adjustment method is only suitable for XIP project. In the final running result, it seems that the application has only run once, and it has not started and executed repeatedly as expected.

If in startup_ In mimxrt1062. S, the reconfiguration flexram code is removed. This wdog routine can work normally, and the serial port assistant can see the circular printing, so it is easy to infer that the reconfiguration flexram function causes the wdog module to work abnormally.

2、 Find the root cause of the program exception

Because the wdog routine is not completely abnormal, at least the first time printing, it shows that the reconfiguration of flexram does not have a substantial impact on the program stack operation and storage, and there is no logic problem with the reconfiguration of flexram code in the boot file. However, the printout will not be available after the wdog timeout. It seems that the wdog module should have a normal soft reset. In order to minimize the code to locate the problem, PI Ziheng will modify the main function of this netizen wdog routine as follows, remove the wdog related code, and directly use NVIC_ Systemreset() instead. After running, it is found that there is still only one printing. The significance of this experiment is that the program cannot run again after soft reset due to the reconfiguration of flexram code, which has nothing to do with the specific wdog module.

int main(void)
{
    BOARD_ConfigMPU();
    BOARD_InitPins();
    BOARD_BootClockRUN();
    BOARD_InitDebugConsole();

    PRINTF("\r\n******** System Start ********\r\n");

    while (1)
    {
        NVIC_SystemReset();
    }
}

Now let’s focus on the assembly code itself of reconfiguration flexram. The code is very simple, that is, the internal iomuxc of i.mxrt chip_ GPR > GPR17 (base address 0x400ac044) and iomuxc_ GPR – > gpr16 (base address: 0x400ac040) is assigned as 0x5555aaaa and 0x00000007 respectively. From the definition of effective function bits of register, this operation is no problem.

LDR R0,=0x400AC044
    LDR R1,=0x5555aaaa
    STR R1,[R0]
    LDR R0,=0x400AC040
    LDR R1,=0x00000007
    STR R1,[R0]

Read the manual about iomuxc_ GPR > GPR17 and iomuxc_ GPR > gpr16 register bit definition, found iomuxc_ Many bits in GPR > gpr16 register are reserved bits, and the default value of bit21 reserved bit is 1, which is different from the default value of 0 of other reserved bits. Obviously iomuxc_ GPR – > gpr16 = 0x00000007 will reset bit21 by mistake, and iomuxc_ GPR register will not change its value after soft reset (seeSummary of GPR registers not reset by systemresetA single article).

Is the problem caused by iomuxc_ GPR > gpr16 [21] the reserved bit is cleared by mistake? Let’s modify the code of reconfiguration flexram as follows (both ways are OK), and change the iomuxc_ GPR – > gpr16 [21] remains the default 1. After running, it is found that the abnormal problem is solved, and you can see the circular printing in the serial assistant. Now we know about iomuxc_ Even the reserved bits of GPR register should not be used as user flag bits easily, and the default value should not be changed easily, because SOC occupies these bits, and the specific purpose is not detailed. It can be inferred that iomuxc_ GPR – > gpr16 [21] bit is related to system startup, and its value setting takes effect after soft reset.

#ifdef FLEXRAM_CFG_STANDARD
    LDR R0,=0x400AC044
    MOV32 R1,0x5555aaaa
    STR R1,[R0]
    LDR R0,=0x400AC040
    LDR R1,[R0]
    ORR R1,R1,#4
    STR R1,[R0]
#else
    LDR R0,=0x400AC044
    LDR R1,=0x5555aaaa
    STR R1,[R0]
    LDR R0,=0x400AC040
    LDR R1,=0x00200007
    STR R1,[R0]
#endif

3、 Cautious assignment method of MCU peripheral registers

Now ruffian Heng reveals the secret of the beginning of the article, what is the cautious peripheral register assignment method. In fact, we can learn from the definition of the chip header file. Suppose we have a module called periph. There is a register named reg in the module, which contains the function bit func (single bit or multi bit). The definition of the chip header file is as follows:

typedef struct {

The core of cautious register assignment method is that each operation only involves one function bit, and does not affect the values of other function bits, as shown in the following code. Avoid the operation of assigning multiple different function bits at one time, such as periph – > reg = value1 | Value2 |.

The cautious register assignment method can not only avoid the limitation of the sequence of different function bit assignment in the module design, but also prevent the exception of changing the default value of some reserved bits by mistake. Of course, there is also a small price, that is, it will increase the length of some code.

//If periph - > reg [func] is single bit

So far, change the iomuxc in i.mxrt1xxx_ The reserved bit of GPR register may cause system abnormality. So the ruffian balance is introduced. Where is the applause~~~

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