PI Ziheng embedded system: a method of fast positioning i.mxrt600 board level design ISP [2:0] boot mode pin power on timing problem


Hello everyone, I’m a ruffian Heng. I’m a serious technical ruffian. Today, ruffian Heng introduces to youA method to quickly locate the power on timing of ISP [2-0] startup mode pins in i.mxrt600 board level design

We know that NXP i.mxrt600 is an MCU product that focuses on the audio market, and it is also the first model of i.mxrt three digit platform. This MCU has been selected by many well-known international customers and is responsible for audio related sub functions as a coprocessor in the project. Many customers have reached the stage of mass production. Recently, piziheng is supporting one of the mass production customers. The customer encountered the problem that several boards in the same batch could not be started normally. Ruffian Heng and colleagues checked together, and finally found that it was the power on timing problem of ISP [2:0] start pin level. This is actually a typical problem. Today, ruffian Heng teaches you a way to quickly locate such problems

1、 This leads to the power on timing problem

Let’s take a look at the customer’s problem first. The following is the schematic diagram of the customer’s board. I.mxrt600 is a coprocessor responsible for the audio function. Its boot pin ISP [2:0] is connected with the main application processor (AP) (in the customer’s project design, AP is not responsible for controlling the boot mode of i.mxrt600). In order to prevent the impact on the ISP pin sampling of i.mxrt600 when it is powered on, The customer specially added a layer of reverse isolation circuit in the middle.

  • Note: in fact, i.mxrt600 supports serial boot mode. In this mode, as a coprocessor, i.mxrt600’s application data can be directly downloaded into i.mxrt600’s internal RAM by AP through the specified UART / I2C / SPI / USB, thus saving an external flash.

In the process of mass production, i.mxrt600 can’t be started on one or two of several hundred boards in the same batch. The customer did a few ABA experiments: blow down the i.mxrt600 chip on the non bootable board and replace it with the board that can be booted normally, but it still can’t be started. On the other hand, the i.mxrt600 chip on the board that can be started normally can be replaced by the board that cannot be started normally, and this board can be started normally.

From the above ABA experiment, it seems that it is not a board level design problem, such as the problem of i.mxrt600 chip on the board. PI Ziheng got a board with problems. After power on, he measured the ISP [2:0] pin level, which is 3’b011 – flexspi boot from Port A. after power on is stable, ISP setting is OK, but no one knows what ISP level value i.mxrt600 bootrom sampled just after power on.

The following is the reverse isolation design of ISP part on the customer board. In order to verify that it is the ISP sampling time problem, we specially modified the circuit and changed rt600_ Boot0 and rt600_ Boot2 was forced to pull up and down, and then power on the board again. Finally, the board can start normally.

Therefore, we can draw a preliminary conclusion: for i.mxrt600, the time from power on to bootrom ISP sampling is not a strictly fixed value. Due to the difference in chip manufacturing, this time should be within a certain range, and there should be enough margin for power on time in board level power supply design. In this project, the power on time margin of the customer is not enough, which leads to the failure to meet the ISP sampling time requirements of individual i.mxrt600 chips.

2、 Boot mode processing in bootrom

Before introducing the method of quickly locating ISP sampling time, PI Ziheng first takes you to understand the processing flow of boot mode in i.mxrt600 bootrom.

Let’s review the old article of PI Ziheng firstBoot configuration (ISP)_ Pin/OTP)》Each time i.mxrt600 chip is hard reset, some system configuration values in OTP will be automatically loaded into the corresponding shadow register of ocotp module (for basic knowledge of ocotp peripherals, please refer toOTP and its writing method)The bootrom mainly uses the following functions_ runtime_ boot_ device_ Info() function to get the final startup mode and store it in the global variable s_ Bootdeviceinfo.

  • Note: ocotp > OTP in the code_ The lower four bits of the show [0x60] register are the primary mentioned in the chip reference manual_ BOOT_ SRC[3:0]
static boot_ device_ info_ t s_ bootDeviceInfo;

Every time i.mxrt600 system soft reset to re execute bootrom, ISP [2:0] pin state will be re sampled, which is completely software sampling. The ISP sampling function in ROM is shown below_ bootpin_ As shown in mode (), the code does the IO level de dithering processing:


The above is the bootrom about boot mode processing code. So is there a way to hang up the debugger and read s directly through the backdoor_ What about the bootdeviceinfo variable value? Sorry, no! Even PI Ziheng can’t do it, although PI Ziheng can know that this variable is placed at the address of 0x10012d38 by checking the bootrom map file. However, i.mxrt600 is integrated in bootromDebug mailbox mechanism, we can’t read the ROM state after normal operation through the debugger. This way won’t work.

3、 Fast positioning ISP [2:0] level sampling problem

In fact, the customer project start-up problem introduced in the first section is relatively well positioned, because there is ABA experiment first, so it can be basically clear that the problem lies in the timing of ISP sampling. But more often, in the customer project development stage, there is no condition for ABA experiment, there may be only one board, and whether the flash configuration and the startup header in the app are correct still need to be verified. In this case, we need to quickly identify whether the ISP sampling timing factors lead to the start-up problem.

When the chip fails to start, our first thought is to know the s in the second section_ What is the bootdeviceinfo value? In this way, we can deduce the ISP pin’s sampling value in ROM, but it doesn’t work. From another perspective, can we not let bootrom sample ISP pins and use an alternative way to determine the startup mode? If bootrom can be started according to the alternative setting in this case, we can also disprove that there is a problem with the timing of ISP pin sampling.

This alternative setting method of startup mode is the method that PI Ziheng will teach you today. Use the debugger to temporarily rewrite ocotp > OTP_ Shadow [0x60] value (yes, we can not burn OTP). After rewriting, we can do a soft reset to the chip. OCOTP->OTP_ The value of the shadow register group will be reloaded only when the chip hardware is reset or the ocotp update command is executed, and the soft reset will not affect its value.

4、 Do an experiment on mimxrt685-evk

Let’s do an experiment on mimxrt685-evk. The flash on this board is connected to flexspi0 port B. we can download an SDK XIP project at will and set the ISP pin dial to 3’b010 – flexspi boot from port B. after reset, the chip can start normally and the project runs normally.

Now we set the ISP pin dial to 3’b110 – Serial ISP. After soft reset, the chip enters the ISP download mode and will not start from flash. Check the chip header file to find out ocotp > OTP_ The shadow [0x60] register address is 0x50130180. Let’s try to rewrite this register now.

/** OCOTP - Register Layout Typedef */

Hang up the j-link debugger, open the j-link commander, connect the chip and select “mimxrt685″_ M33 “, and then use the W4 command to write 0x00000005 (in primary) at the address of 0x50130180_ BOOT_ In SRC [3:0] definition, 4’b0101 is QSPI_ B_ BOOT)。

Continue to execute the reset and go commands (or press the on-board soft reset button reset button SW3). At this time, you can see that the chip starts normally from flash and the SDK XIP project runs again. Obviously, the ISP pin level setting is ignored at this time, so we have found an effective alternative setting method for startup mode.

Finally, when using j-link soft reset, if you see the following log, you have to check the specific functions of the resettarget() function in jlinkscript to ensure that the kernel is reset.

So far, the method of quickly locating the power on timing of ISP [2-0] startup mode pins in i.mxrt600 board level design is introduced. Where is the applause~~~

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