EEPROM and flash cannot replace SRAM in most applications


With the rapid development of semiconductor technology, various memories have been introduced one after another, and the performance has been continuously improved. As we all know, the data in the ordinary SRAM disappears immediately after the power supply is powered off. After power on again, the data in the memory is a random number. This is undoubtedly not allowed for application systems that need to save a large number of field data and various system parameters. Although EPROM data will not be lost due to power failure, EPROM can only write data with a special writer and cannot replace the corresponding SRAM.

There is no refresh problem in SRAM. An SRAM basic memory cell is composed of two transistors and two resistors. It does not use capacitors to store data, but is realized by switching the state of transistors. Just as transistors in CPU can represent 0 and these two states respectively by switching different states, it is precisely because of this structure that the reading process of SRAM will not causeSRAMIf the information stored in memory is lost, of course, there is no refresh problem.


EEPROM and flash are electrically erasable and can partially replace the corresponding SRAM. However, the writing speed of EEPROM and flash (MS level) is too slow compared with SRAM (ns level), so it is impossible to store the intermediate results generated by calculation and write a large amount of data randomly at high speed. The writing times of EEPROM and flash are limited (about 100000 times), while SRAM can write unlimited times. More importantly, unless EEPROM and flash areMemory flashThe chip selection signal is controlled by a special circuit, and miswriting will occur during power on and power down. Although flash has hardware and software write protection, its protection algorithm is very inconvenient to use and the effect is not ideal. It can not replace SRAM in most applications.